Experimental Test of 3.6 kW Totem-Pole Converter Using State of the Art SiC MOSFETs
Author
Sørensen, Benjamin Spragg
Term
4. term
Education
Publication year
2025
Abstract
Denne afhandling undersøger, hvordan effektiviteten af en eksisterende konverter i en Migatronic-svejsemaskine kan forbedres ved at anvende en 3,6 kW totempæl-topologi baseret på moderne SiC‑MOSFET’er. Konverteren er designet, simuleret og eksperimentelt valideret, med fokus på komponenttab, konfigurationsvalg og transistorvalg for at opfylde Migatronics krav. Der er udviklet to FPGA-baserede styresystemer: en DC‑DC-tilstand ved 100 kHz med dead-time og en invertertilstand, der genererer en 50 Hz sinusformet duty-cycle ved 100 kHz; begge er afprøvet i laboratoriet med dokumenteret funktion. I designet anvendes C3M0045065K i højfrekvensbenet og C3M0025065K i lavfrekvensbenet. Simulationer forudsiger op til 98,9 % virkningsgrad; i DC‑DC konfiguration blev der bl.a. vist boost til ca. 397 V, og i invertertilstand opnåedes 228,9 V rms og 15,48 A rms ved 50 Hz. En prototype på et tolags PCB bekræfter konceptet: DC‑DC-tests viser konvertering over 39–415 V med estimerede virkningsgrader på 99,1 % ved 2,3 kW og 99,3 % ved 3,6 kW; i invertertests muliggjorde en 3,3 µF kondensator konvertering af 329 V DC til 168 V rms med estimeret 98,9 % virkningsgrad ved 1,86 kW. Resultaterne indikerer, at en SiC‑baseret totempæl kan nå meget høj effektivitet i svejseanvendelser.
This thesis investigates improving the efficiency of an existing converter in a Migatronic welding machine by adopting a 3.6 kW totem-pole topology using state-of-the-art SiC MOSFETs. The converter was designed, simulated, and experimentally validated, with analyses of component losses, topology selection, and transistor choice to meet Migatronic’s requirements. Two FPGA-based controllers were implemented: a 100 kHz DC-DC mode with dead time and an inverter mode that synthesizes a 50 Hz sinusoidal duty cycle at 100 kHz; both were validated in laboratory tests. C3M0045065K devices were used in the high-frequency leg and C3M0025065K in the low-frequency leg. Simulations predicted up to 98.9% efficiency; in DC-DC configuration boosting to about 397 V was demonstrated, and in inverter mode 228.9 Vrms and 15.48 Arms at 50 Hz were achieved. A two-layer PCB prototype confirmed the concept: DC-DC tests covered 39–415 V with estimated efficiencies of 99.1% at 2.3 kW and 99.3% at 3.6 kW; in inverter tests, adding a 3.3 µF capacitor enabled conversion of 329 V DC to 168 Vrms with an estimated 98.9% efficiency at 1.86 kW. The results indicate that a SiC-based totem-pole stage can meet very high efficiency targets for welding applications.
[This summary has been generated with the help of AI directly from the project (PDF)]
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