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A master's thesis from Aalborg University
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Design and Verification of a Fault Injection Module for White Rabbit Networks

Author

Term

4. semester

Publication year

2026

Submitted on

Abstract

White Rabbit is a very high-precision synchronization protocol based on Ethernet and the IEEE 1588 standard, capable of achieving timing accuracy better than one nanosecond. As White Rabbit is increasingly used in critical infrastructure, it becomes more important to test how well these systems tolerate faults in the physical layer (the actual data link). However, there are currently no dedicated tools for systematically injecting such faults into White Rabbit systems. This thesis presents the design and implementation of a VHDL-based fault injection module that is integrated into the White Rabbit PTP Core. The module can generate several categories of physical-layer errors, including data corruption, manipulation of data symbols, and disturbances of the ddmtdc phase (a method used for very precise phase difference measurements). The fault injector is controlled through Wishbone-mapped registers, which means it can be operated both in simulations and on real hardware via a command-line tool. In simulation, the module has been functionally verified, and on physical White Rabbit hardware it has been partially validated: Eight out of ten fault modes produced observable effects on the hardware, one mode caused unexpected PTP failures even at low injection rates, and two timing-related modes could not be validated due to a SoftPLL lock issue.

White Rabbit er en synkroniseringsprotokol med meget høj præcision, der bygger på Ethernet og standarden IEEE 1588. Den kan opnå tidsnøjagtighed ned til under ét nanosekund. I takt med at White Rabbit bruges mere i kritisk infrastruktur, bliver det stadig vigtigere at undersøge, hvordan systemet reagerer på fejl i det fysiske lag (det vil sige på selve dataforbindelsen). Der findes dog ikke særlige værktøjer til at teste White Rabbit-systemer ved at påvirke dem med kontrollerede fejl. Dette projekt beskriver design og implementering af en VHDL-baseret fejlindskyder (fault injection modul), som bygges ind i White Rabbit PTP Core. Modulet kan skabe flere typer fejl på det fysiske lag, blandt andet datakorruption, manipulation af symbolske repræsentationer af data samt forstyrrelser i ddmtdc-fase (en teknik til meget præcis måling af faseforskelle). Fejlindskyderen styres via registre på en Wishbone-bus, hvilket gør det muligt at kontrollere den både i simuleringer og på rigtig hardware via et kommandolinjeværktøj. I simulering er modulet funktionelt verificeret, og på fysisk White Rabbit-hardware er det delvist valideret: Otte ud af ti fejlfunktioner gav målbare effekter på hardwaren, én mode medførte uventede PTP-fejl selv ved lave fejlindskytningsrater, og to tidsrelaterede modes kunne ikke valideres på grund af problemer med SoftPLL-låsning.

[This abstract has been rewritten with the help of AI based on the project's original abstract]