Computational Considerations for Ultra-Reliable Low Latency Wireless Networks
Author
Hagelskjær, Alexander Korsvang
Term
4. term
Education
Publication year
2019
Submitted on
2019-06-06
Pages
73
Abstract
Industrielle styringsnet er traditionelt kablede, fordi de kræver meget lav forsinkelse og høj pålidelighed. Nye mobilnet lover forbedringer, men rækker ikke til de mest krævende anvendelser. Wireless Isochronous Real Time communication (WIRT) er et nyt trådløst system målrettet netværksbaserede reguleringssystemer med periodiske overførsler og meget stramme krav til forsinkelse og pålidelighed. Isokron betyder, at beskeder sendes med faste intervaller. Dette speciale undersøger, hvad der skal til for at implementere WIRTs fysiske lag – den del, der omsætter bits til radiobølger og tilbage igen. Den foreslåede arkitektur bygger på Orthogonal Frequency Division Multiplexing (OFDM), som fordeler data over mange delbærere, og anvender ultrabredbåndsspektret (UWB), der udnytter meget brede frekvensbånd. Der er bygget en prototype ved at integrere UWB-testudstyr som en forsøgsplatform for videre WIRT-udvikling. Med denne opstilling identificeres hvilke dele af sender-modtagerkæden der giver mest forsinkelse, den mindste mulige samlede forsinkelse bestemmes, og den beregningsmæssige kompleksitet af hver komponent vurderes. På baggrund af analysen diskuteres arkitekturer, der holder latenstiden nøjagtig og forudsigelig. Arbejdet viser, at dekodning af fejlrettende koder (ECC) er den største enkeltkilde til forsinkelse. Specialet præsenterer algoritmiske ændringer, der sænker den minimale dekoderforsinkelse til et acceptabelt niveau, og beskriver andre hensyn, der kræves for at realisere systemet på en rekonfigurerbar logikplatform, som kan omprogrammeres efter produktion. Afslutningsvis skitseres yderligere skridt for at demonstrere systemets gennemførlighed.
Industrial control networks are usually wired because they demand very low delay and high reliability. New cellular networks promise improvements, but they still fall short for the most demanding use cases. Wireless Isochronous Real Time communication (WIRT) is a new wireless approach for networked control systems with periodic transmissions and extremely tight latency and reliability requirements. Isochronous means messages are sent at fixed intervals. This thesis examines what it takes to implement WIRT at the physical layer—the part that turns bits into radio waves and back. The proposed architecture uses Orthogonal Frequency Division Multiplexing (OFDM), which spreads data across many subcarriers, operated in the Ultra-Wideband (UWB) spectrum, which uses very wide frequency ranges. A prototype was built by integrating UWB test equipment to create a testbed for further WIRT development. Using this setup, the work identifies which blocks in the transceiver chain contribute most to delay, determines the minimum achievable overall latency, and evaluates the computational complexity of each component. Based on this analysis, the thesis discusses architectures that keep latency accurate and predictable. The results show that decoding error correction codes (ECC) is the single largest contributor to latency. The thesis introduces algorithmic changes that reduce the minimum decoding delay to an acceptable level, and outlines other considerations needed to implement the system on reconfigurable logic hardware that can be reprogrammed after manufacturing. Finally, it highlights remaining steps needed to demonstrate the system’s feasibility.
[This abstract was generated with the help of AI]
Keywords
WIRT ; Wireless communication ; Signal Processing ; FPGA ; UWB ; OFDM ; ECC
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