A low-power GPS signal acquisition algorithm is designed, evaluated and implemented for use on small-satellites in low earth orbit. In order to evaluate the high dynamic environment in relation to signal acquisition, empiric data is obtained using the SGP4 perturbation model for 24 GPS satellites and the Ørsted and AAU Cubesat missions. This shows that a maximum Doppler shift offset of $\pm$45 kHz on the \LI carrier can be expected with a mean drift of -29 Hz/s. With an outset in these constraints a maximum likelihood estimator-based signal acquisition algorithm is proposed that enables acquisition of 98.3\% of the GPS signals under continuous receiver operation. The design space of the algorithm is explored to minimize area and power of the implementation. The algorithm is realized using a semi-systolic array of add/subtract controlled accumulators. The received GPS signal ripples through the accumulators, whereas spreading codes are used to control the add/subtract behavior, effectively correlating the spreading codes with the received signal. The architecture is modeled in VHDL and implemented on a FPGA. If the quiescent power of the FPGA is disregarded, the final solution, including an active patch antenna and GPS front-end, has a power consumption of approximately 400 mW. Due to practical issues it was not possible to fully confirm the functionality of the implemented algorithm, but theory and offline simulations all work as intended.