Author(s)
Term
4. term
Education
Publication year
2021
Submitted on
2021-05-28
Pages
116 pages
Abstract
In recent years, the need for high-power testing such as grid emulation systems has become increasingly popular. Following former investigations by the authors in [1], a Modular Multilevel Converter (MMC) based grid emulator is of interest. This thesis considers the development of an MMC Submodule (SM) for high-power test applications. In the pursuit of finding a suitable design, a development methodology is presented considering different development phases, introducing Design Failure Mode and Effect Analysis (DFMEA) as part of the procedure. During the project, various subsystems of the SM are determined, mainly focusing on two streams, namely, power hardware and control hardware. In the design phase, a clear test methodology is developed to test the SM, including both commissioning and design validation tests. The test shows results within the requirements of the considered MMC for high-power testing. Finally, the design is validated based on the experimental results and a Technology Readiness Level (TRL) analysis. It can be concluded that the MMC SM shows promising properties for future engaging in a full MMC, with only a few failure modes which are detected and mitigated.
Keywords
Documents
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